Along with the advancement of semiconductor device microfabrication, decrease in resistance has been demanded of contacts which electrically connect a diffusion layer, which includes source regions, drain regions, etc., and a wiring layer. To this end, conventional contact formation with tungsten has been gradually replaced by contact formation with copper which is a lower resistance material. An example of such copper contact formation is described below with reference to FIGS. 9A-9D.
As shown in FIG. 9A, the initial steps are formation of device isolation (not shown) in a semiconductor substrate 1, implantation of impurities, and formation of a metal-containing compound layer 2. Thereafter, a first dielectric film 3 is formed over the semiconductor substrate 1 and the metal-containing compound layer 2 (a metal silicide layer formed over, for example, the source and drain regions). Then, a contact hole 4 is formed in the first dielectric film 3 using lithography, dry etching, wet etching, etc., so as to reach the metal-containing compound layer 2.
Then, part of the surface of the metal-containing compound layer 2 exposed at the bottom of the contact hole 4 is cleaned by argon sputtering, chemical dry etching, or the like. Thereafter, as shown in FIG. 9B, a barrier layer 5 is formed of a tantalum film, a tantalum nitride film, or a two-layered film of tantalum and tantalum nitride so as to cover the bottom and side wall of the contact hole 4 and the upper surface of the first dielectric film 3 using physical vapor deposition. Then, a seed layer 6 is formed by physical vapor deposition so as to cover the barrier layer 5. Then, a copper layer 7 is formed by electrolytic plating so as to fill the contact hole 4 in which the barrier layer 5 and the seed layer 6 have been formed.
Then, the semiconductor substrate 1 is thermally treated at a predetermined temperature, and thereafter, part of the barrier layer 5, the seed layer 6 and the copper layer 7 extending outside the contact hole 4 is removed by chemical mechanical polishing as shown in FIG. 9C, whereby a contact 8 is formed.
Then, as shown in FIG. 9D, a second dielectric film 9 and a third dielectric film 10 are formed in this order over the first dielectric film 3 and the contact 8. Then, a trench is formed in the second dielectric film 9 and the third dielectric film 10 so as to expose the upper surface of the contact 8. Then, a barrier layer 15, a seed layer 16, and a copper layer 17 are formed inside the trench, which constitute a first wiring layer 11. In this process, lithography, dry etching, wet etching, physical vapor deposition, chemical vapor deposition, and chemical mechanical polishing, etc., are used as necessary.
Thereafter, an upper contact hole, an upper wiring layer, etc., are formed (although none of these are shown), whereby fabrication of a semiconductor device is completed.